Junior Technology Integration Engineer (m/w/d)
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Junior Technology Integration Engineer (m/w/d) - (Job Number%5C: 20001869)!|!false!|!211883!|!false!|!true!|!https%5C://gfoundries.taleo.net/careersection/jobdetail.ftl?job=20001869%26lang=en!|!Junior Technology Integration Engineer (m/w/d)!|!true!|!Junior Technology Integration Engineer (m/w/d)!|!20001869!|!20001869!|!!*!%3Cspan id=%22docs-internal-guid-3e4e9037-030d-857b-4f09-1ef30c4b912b%22%3E%3Cb%3E%3Cfont color=%22black%22 face=%22Verdana%22 size=%225%22%3E%3Cfont color=%22#ff6600%22 size=%226%22%3EShaping the future with innovation and smart technologies .... our growth offers development opportunities for your career%3C/font%3E %3C/font%3E%3C/b%3E%0A%3Cdiv%3E%0A%3Cdiv%3E%0A%3Cdiv%3E%26nbsp;%3C/div%3E%0A%3Cdiv%3E%3Cfont color=%22black%22 face=%22Verdana%22 size=%224%22%3EWe are Europe’s largest semiconductor manufacturing location, combining smart solutions with leading edge technologies in our Dresden Foundry - for our customers, for groundbreaking products and for a sustainable future. In addition to our existing manufacturing of 28nm semiconductor products, our new 22nm technology (22FDX) sets standards with regard to energy efficiency and performance. With our energy saving technology, we are targeting the growth markets of the future%5C: the %27Internet of Things%27, including areas such as Industry 4.0, Wearables, Automotive, 5G and RF/mmWave.%3C/font%3E%3C/div%3E%0A%3Cdiv%3E%26nbsp;%3C/div%3E%3Cdiv%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont face=%22Verdana%22%3E%3Cfont style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3Cfont size=%225%22%3E%3Cfont color=%22#ff6600%22%3E%3Cb%3E%3Cfont face=%22Verdana%22%3EJunior%3C/font%3E%3Cfont face=%22Verdana%22%3E Technology Integration Engineer (m/f/d)%3C/font%3E%3C/b%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%26nbsp;%3C/div%3E%3Cdiv dir=%22ltr%22%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3Cfont size=%224%22%3EAs Junior Technology Integration Engineer you will participate in advanced technology manufacturing and development in GLOBALFOUNDRIES%27 state-of-the-art 300 mm wafer fab (Fab1) in Dresden, Germany.%3Cfont color=%22#000000%22%3E %3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3EYou will work in an intercultural team with interfaces to different production sites.%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont face=%22Verdana%22 size=%224%22%3E%26nbsp;%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3EReporting to the Fab1 Integration management, the primary responsibility of this position is to manage an integrated CMOS process flow, drive improvements to enhance yield, reliability and manufacturability of this flow, as well as understand and meet the customer needs from Fab1.%3C/font%3E%3C/div%3E%0A%3Cdiv%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cb%3EYour Job%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3C/font%3E%3C/div%3E%0A%3Cul%3E%0A%3Cli%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3EContribute to Development, optimization and stabilization%3C/font%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3E of process integration for 55, 40, 28, 22nm nodes. Focus is the interaction between design, technology development projects and customer specific requirements to meet the physical and the electrical requirements of leading edge semiconductor technologies in a foundry environment%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%0A%3Cli%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: transparent;%22%3EIdentify, mitigate and reduce production risks. Drive improvements in yield and manufacturability across the CMOS process flow%3C/font%3E%3C/font%3E%3C/li%3E%0A%3Cli%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: transparent;%22%3ECollaborate with Fab1 teams, specifically with manufacturing engineering, yield engineering, design, quality, reliability and analysis labs%3C/font%3E%3C/font%3E%3C/li%3E%3C/ul%3E%3Cfont color=%22#000000%22%3E%0A%3Cp style=%22margin-top%5C: 0px; margin-bottom%5C: 0px;%22%3E%3Cfont color=%22#ff6600%22 size=%225%22%3E%3Cbr%3E%3C/font%3E%0A%3C/p%3E%3C/font%3E%3C/div%3E%3C/div%3E%3C/span%3E!|!!*!%3Cspan id=%22docs-internal-guid-3e4e9037-030d-857b-4f09-1ef30c4b912b%22%3E%3Cb%3E%3Cfont color=%22black%22 face=%22Verdana%22 size=%225%22%3E%3Cfont color=%22#ff6600%22 size=%226%22%3EShaping the future with innovation and smart technologies .... our growth offers development opportunities for your career%3C/font%3E %3C/font%3E%3C/b%3E%0A%3Cdiv%3E%0A%3Cdiv%3E%0A%3Cdiv%3E%26nbsp;%3C/div%3E%0A%3Cdiv%3E%3Cfont color=%22black%22 face=%22Verdana%22 size=%224%22%3EWe are Europe’s largest semiconductor manufacturing location, combining smart solutions with leading edge technologies in our Dresden Foundry - for our customers, for groundbreaking products and for a sustainable future. In addition to our existing manufacturing of 28nm semiconductor products, our new 22nm technology (22FDX) sets standards with regard to energy efficiency and performance. With our energy saving technology, we are targeting the growth markets of the future%5C: the %27Internet of Things%27, including areas such as Industry 4.0, Wearables, Automotive, 5G and RF/mmWave.%3C/font%3E%3C/div%3E%0A%3Cdiv%3E%26nbsp;%3C/div%3E%3Cdiv%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont face=%22Verdana%22%3E%3Cfont style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3Cfont size=%225%22%3E%3Cfont color=%22#ff6600%22%3E%3Cb%3E%3Cfont face=%22Verdana%22%3EJunior%3C/font%3E%3Cfont face=%22Verdana%22%3E Technology Integration Engineer (m/f/d)%3C/font%3E%3C/b%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%26nbsp;%3C/div%3E%3Cdiv dir=%22ltr%22%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3Cfont size=%224%22%3EAs Junior Technology Integration Engineer you will participate in advanced technology manufacturing and development in GLOBALFOUNDRIES%27 state-of-the-art 300 mm wafer fab (Fab1) in Dresden, Germany.%3Cfont color=%22#000000%22%3E %3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3EYou will work in an intercultural team with interfaces to different production sites.%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont face=%22Verdana%22 size=%224%22%3E%26nbsp;%3C/font%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3EReporting to the Fab1 Integration management, the primary responsibility of this position is to manage an integrated CMOS process flow, drive improvements to enhance yield, reliability and manufacturability of this flow, as well as understand and meet the customer needs from Fab1.%3C/font%3E%3C/div%3E%0A%3Cdiv%3E%3Cbr%3E%3C/div%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%0A%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cb%3EYour Job%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3C/font%3E%3C/div%3E%0A%3Cul%3E%0A%3Cli%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3EContribute to Development, optimization and stabilization%3C/font%3E%3Cfont face=%22Verdana%22 style=%22background-color%5C: transparent;%22%3E of process integration for 55, 40, 28, 22nm nodes. Focus is the interaction between design, technology development projects and customer specific requirements to meet the physical and the electrical requirements of leading edge semiconductor technologies in a foundry environment%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%0A%3Cli%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: transparent;%22%3EIdentify, mitigate and reduce production risks. Drive improvements in yield and manufacturability across the CMOS process flow%3C/font%3E%3C/font%3E%3C/li%3E%0A%3Cli%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: transparent;%22%3ECollaborate with Fab1 teams, specifically with manufacturing engineering, yield engineering, design, quality, reliability and analysis labs%3C/font%3E%3C/font%3E%3C/li%3E%3C/ul%3E%3Cfont color=%22#000000%22%3E%0A%3Cp style=%22margin-top%5C: 0px; margin-bottom%5C: 0px;%22%3E%3Cfont color=%22#ff6600%22 size=%225%22%3E%3Cbr%3E%3C/font%3E%0A%3C/p%3E%3C/font%3E%3C/div%3E%3C/div%3E%3C/span%3E!|!!*!%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cdiv%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cb%3EYour Profile%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cdiv%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cbr%3E%3C/font%3E%3C/font%3E%3C/div%3E%3C/font%3E%3C/font%3E%3Cul%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3EM.Sc. / Dipl.-Ing in Electrical Engineering, Materials Science, Solid State Physics or other relevant technical discipline is required, PhD is welcome%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont%3E%3Cfont face=%22Verdana%22%3Eup to %3C/font%3E%3Cfont face=%22Verdana%22%3E2 years %3C/font%3E%3Cfont face=%22Verdana%22%3Eof semiconductor process experience in multiple process modules or process integration and experience in advanced technology (%26lt;=28nm) is preferred%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont%3E%3Cfont face=%22Verdana%22%3EY%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3Eou should have a solid knowledge of semiconductor physics, modern CMOS process integration, with some exposure to process integration, design or semiconductor processing, with deeper knowledge of minimum one of these areas%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EExposure to semiconductor volume manufacturing methods, statistical methods, lean-six-sigma-methods, external customer interactions and multiple-culture working environments would be very beneficial%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EAdditional technical experience in reliability engineering, defect inspection and reduction and yield enhancement would be a plus%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3EEx%3Cfont color=%22#000000%22 face=%22Verdana%22%3Ecellent oral and written communication skills in English are required%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EStrong interpersonal skills are required to work in cross-functional teams%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3C/ul%3E%3C/div%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cbr%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3C/font%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cb%3EWe offer%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cb%3E%3Cbr%3E%3C/b%3EThe position is open-ended and should be filled as soon as possible.%26nbsp;%3C/font%3E%3C/div%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cbr%3EOur attractive salary and the social benefits of an international company speak for themselves%5C: You benefit from 30 days%27 holiday, 13 monthly salaries and bonus payments. We provide you with financial support when you move to Dresden if you live more than 100 km away. For additional free time, you may be able to convert parts of your 13th monthly salary into free time. The continued payment of wages in case of illness is a matter of course. You can expect regular training and interesting development prospects. Further attractive fringe benefits can be found in detail at %3Ca href=%22http%5C://www.globalfoundries-gesundevielfalt.de%22%3E%3Cb%3Ewww.globalfoundries-g...!|!!*!%3Cdiv dir=%22ltr%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cdiv%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cb%3EYour Profile%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cdiv%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cbr%3E%3C/font%3E%3C/font%3E%3C/div%3E%3C/font%3E%3C/font%3E%3Cul%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3EM.Sc. / Dipl.-Ing in Electrical Engineering, Materials Science, Solid State Physics or other relevant technical discipline is required, PhD is welcome%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont%3E%3Cfont face=%22Verdana%22%3Eup to %3C/font%3E%3Cfont face=%22Verdana%22%3E2 years %3C/font%3E%3Cfont face=%22Verdana%22%3Eof semiconductor process experience in multiple process modules or process integration and experience in advanced technology (%26lt;=28nm) is preferred%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont%3E%3Cfont face=%22Verdana%22%3EY%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3Eou should have a solid knowledge of semiconductor physics, modern CMOS process integration, with some exposure to process integration, design or semiconductor processing, with deeper knowledge of minimum one of these areas%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EExposure to semiconductor volume manufacturing methods, statistical methods, lean-six-sigma-methods, external customer interactions and multiple-culture working environments would be very beneficial%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EAdditional technical experience in reliability engineering, defect inspection and reduction and yield enhancement would be a plus%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont size=%224%22%3EEx%3Cfont color=%22#000000%22 face=%22Verdana%22%3Ecellent oral and written communication skills in English are required%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3Cli%3E%3Cfont color=%22#f79646%22 face=%22Verdana%22 size=%221%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3E%3Cfont color=%22#000000%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22%3EStrong interpersonal skills are required to work in cross-functional teams%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/font%3E%3C/li%3E%3C/ul%3E%3C/div%3E%3Cfont color=%22#000000%22 face=%22Verdana%22%3E%3Cbr%3E%3Cfont color=%22#000000%22 face=%22Verdana%22 size=%224%22 style=%22background-color%5C: rgb(255, 255, 255);%22%3E%3C/font%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cb%3EWe offer%5C:%3C/b%3E%3C/font%3E%3C/div%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cb%3E%3Cbr%3E%3C/b%3EThe position is open-ended and should be filled as soon as possible.%26nbsp;%3C/font%3E%3C/div%3E%3Cdiv%3E%3Cfont size=%224%22%3E%3Cbr%3EOur attractive salary and the social benefits of an international company speak for themselves%5C: You benefit from 30 days%27 holiday, 13 monthly salaries and bonus payments. We provide you with financial support when you move to Dresden if you live more than 100 km away. For additional free time, you may be able to convert parts of your 13th monthly salary into free time. The continued payment of wages in case of illness is a matter of course. You can expect regular training and interesting development prospects. Further attractive fringe benefits can be found in detail at %3Ca href=%22http%5C://www.globalfoundries-gesundevielfalt.de%22%3E%3Cb%3Ewww.globalfoundries-g...!|!F1 PROC INT-890920504!|!F1 PROC INT-890920504!|!Europe %26 Middle east Region-Germany-Saxony-Dresden-DE, Dresden!|!Europe %26 Middle east Region-Germany-Saxony-Dresden-DE, Dresden!|!Jun 23, 2020, 4%5C:28%5C:12 PM!|!Jun 23, 2020, 4%5C:28%5C:12 PM!|!!|!false!|!211883!|!211883!|!true!|!211883!|!false!|!Submission for the position%5C: Junior Technology Integration Engineer (m/w/d) - (Job Number%5C: 20001869)!|!false!|!211883!|!false!|!true!|!https%5C://gfoundries.taleo.net/careersection/jobdetail.ftl?job=20001869%26lang=en!|!Junior Technology Integration Engineer (m/w/d)!|!true!%24!ftlerrors!|!!|!descRequisition.size!|!1!|!descRequisition.nbElements!|!1!|!descRequisition.isEmpty!|!false!|!descRequisition.hasElements!|!true!|!pSessionTimeout!|!0!|!pSessionWarning!|!0!|!pBeaconBeat!|!0!|!focusOnField!|!!|!csrftoken!|!5GQjVuYLew9beonmTkExn1ELVnPBw7VcnyFNdisUr0o=!|!emptyListToken!|!!|!isListEmpty!|!false!|!listCount!|!!|!displayCalloutInLegend!|!true!|!addThisRequired!|!true!|!jobboardListPageTitle!|!!|!commonDescriptionForAddThis!|!!|!alreadyAppliedColumnDisplayed!|!false!|!displayDraft!|!!|!displaymessage!|!false!|!initialHistoryPage!|!1!|!restoreInitialHistoryOnRefresh!|!false!|!applicationCandidateNo!|!!|!calloutPageDisplayed!|!true!|!descriptionLogginMandatory!|!false!|!displayAsMainHeader!|!false!|!displayListingsPerPage!|!false!|!displayUrgentNeed!|!!|!isApplicantUser!|!true!|!jobsPerPageCaption!|!Job {0} out of {1}!|!listEmptyIsApplicantUser!|!true!|!listLabels!|!!|!listLocales!|!!|!requisitionno!|!211883!|!interfaceIdForTimeZone!|!requisitionDescriptionInterface!|!isJobCartActionDisplayed!|!true!|!openDescFrom!|!default!|!serializedCriteria!|!!|!sortby!|!11!%24!requisitionDescriptionInterface!|!!|!!|!!|!!|!!|!Apply for this position online!|!Apply by Email!|!Apply to this position by email!|!Add this position to the job cart!|!!|!Job Description!|!Tell us about a friend who might be interested in this job. All privacy rights will be protected.!|!false!|!Tell us about a person who might be interested in working for our organization. All privacy rights will be protected.!|!true!|! !|!Apply for this position online!|!Apply to this position by email!|!Add this position to the job cart!|!!|!!|!!|!" />Go to the main content section.
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